I/O Principles
System bus
At the heart of the computer is the microprocessor system:
- CPU (central processing unit), also called a processor
- Memory circuits — ROM and RAM — containing programs and data
- I/O circuits controlling electronic devices, such as keyboard and screen
These are connected by three sets of wires: the address bus, data bus and control bus, known collectively as the system bus.
The CPU uses the address bus to broadcast the location it wishes to read from (or write to). It then uses the control bus to trigger a read or write operation, and select either memory or I/O. Finally, data is sent to / from the CPU along the data bus.
Expansion bus & local bus
The original PC ISA system extends the system bus to allow extra I/O circuits to be plugged into the system bus by adding card connectors to form an expansion bus.
The local bus is the section of the system bus that connects CPU and memory. Some expansion cards (e.g. graphics cards) tap directly into this local bus because it faster than the normal expansion bus.
Controlling I/O devices
Control & data registers
Every device connected to a computer needs a device controller.
Device controllers are usually operated by use of a control register (which selects the mode of operation) and a data register (which carries data to / from the device). This technique is known as programmable I/O.
Example — a simple disk drive might be interfaced as follows:
| control register | data register | notes | |
|---|---|---|---|
| 00H | (out) | head no. | Select head number |
| 01H | (out) | cylinder no. | Select cylinder (track) number |
| 02H | (out) | sector no. | Select sector number |
| 03H | (out) | data to write | Write data at current location |
| 04H | (in) | data from disk | Read data from current location |
| 05H – FFH | — | — | Not used |
I/O Addresses
Device controllers are wired to the system bus and identified by unique addresses, just like memory locations. This address is called the I/O address.
Windows System Information will identify the I/O addresses used by devices on a PC.
Port I/O versus memory-mapped I/O
When a separate set of addresses is used for I/O devices this is called port-mapped I/O. This technique is used by most Intel microprocessors.
Other manufacturers prefer to wire I/O devices directly into memory addresses. This removes the need for special I/O instructions but decreases the amount of ROM and RAM that may be addressed. This technique is called memory-mapped I/O and is preferred by processor manufacturers like Motorola.
Responding to I/O devices
I/O devices can be programmed by the CPU using control and data registers but they often need to report information back to the CPU — how does the CPU know that a device is ready to report back?
Polling
Polling is the simplest method of solving this problem: the CPU checks the control register at regular intervals, looking for a specific code. However, most of the time the device will have nothing to report — so this is an inefficient and poor technique.
Interrupt
The better solution is to install an interrupt wire feeding back to the CPU. When a device is ready to report back it sends a signal along this wire (part of the control bus). The CPU pauses its current task and deals with the device; it then resumes what it was doing.
The program code that deals with the device is called an interrupt service routine and it will be supplied as part of the device driver.
IRQs
There are many devices but only one interrupt wire. PCs use an interrupt controller chip to create multiple interrupt wires, each fed to a different device. When a device signals an interrupt the chip triggers the main interrupt wire and tells the CPU which device has called, allowing the appropriate service routine to be carried out.
On the PC these wires are given IRQ (interrupt request) numbers, e.g. IRQ2, IRQ7, etc. The IRQ wires are part of the control bus and form part of the expansion bus.
NMI
Some processors have a special interrupt wire reserved for emergencies, which as memory errors. This is called the non-maskable interrupt (NMI) and it has the highest priority.
DMA
With traditional programmed I/O the CPU reads data in from an I/O devices and stores it memory; it also copies data from memory out to I/O circuits. This technique is slow and places a heavy load on the processor, so a better method was developed to move blocks of data between memory and I/O circuits.
Direct Memory Access
When large blocks of data need to be transferred between a device and main memory, the CPU sends a signal to a special chip called the DMA controller.
This chip disconnects the CPU, hijacking the system bus, and juggles bus signals to feed data directly from I/O to memory (or from memory to I/O). When finished, control is handed back again to the CPU.
DMA transfers are common for disk drives, sound cards and graphics cards. Indeed, hard drive DMA is continually improving in efficiency: newer device controllers offer faster Ultra DMA (UDMA) modes for the latest IDE / SATA and SCSI hard drives.