The main memory of a computer holds instruction codes and data ready to be processed by the CPU. Programs and data that are not being used are stored on auxiliary storage (such as disks, tapes or CD).
Main memory is built from ROM and RAM chips.
Read-Only Memory (ROM) uses wires to form a grid of rows and columns which are linked at chosen points.
A voltage is placed on a selected row (determined by the address) and the column scanner outputs the detected voltage as a binary number. Links represent '1' and no-links represent '0'. In this way programs and data may be stored in a ROM chip.
ROM memory is randomly-accessed. This means that addresses can be specified in any order.
Early ROMs were expensive due to the cost of fabricating the link mask when building the chips. The links cannot be changed after production.
Programmable ROM (PROM) chips are mass-produced with fuses linking all rows and columns (i.e. '1' in every location).
By sending large voltages along row and column wires, individual fuses can be blown, removing the link. In this way a computer designer can "blow" or "burn" an entire chip with any program or data they desire, at low cost.
Like CD-R, a PROM can only be burned once. If the designer wants to store new data they must replace the chip with a new PROM.
PROM fuses can be made from chemicals that respond to ultra-violet (UV) light. When UV shines on the grid, any "blown" fuses will re-form, resetting the chip to its original unused state. This type of chip is called an Erasable PROM (EPROM).
EPROMs are instantly recognisable because they have a small, round window on top through which UV light can be shone. The window is usually covered with a sticker to prevent accidental erasure.
Because of their low cost and the ease with which they could be re-programmed, EPROM chips were used for many years in PCs to hold the permanent BIOS program that runs when the PC is switched on.
Electrically-Erasable PROM (EEPROM or E²PROM) is like EPROM but it can be wiped without needing to be removed and placed under UV light. This means that it can be re-programmed in situ, i.e. on the motherboard.
Flash ROM is an improved form of EEPROM that can be erased in sections.
Modern PCs use a Flash ROM to hold the BIOS program. The BIOS can therefore be updated by instructing the motherboard to re-write the chip with data read from a disk. This is called "flashing the BIOS".
If a flashing operation fails partway through then the computer could become unbootable, blocking any further attempt to re-flash the ROM. For this reason some motherboards feature a dual BIOS ROM, with the second chip provided as backup.
Many PC devices such as expansion cards and CD / DVD drives store control programs and settings on Flash ROM. These may also be re-flashed with updated software.
RAM stands for Random Access Memory but this term is misleading because other kinds of memory may also be randomly accessed (i.e. ROM).
A better name would be Read-Write Memory because this describes its function well. However, for historical reasons the name RAM has stuck.
Like ROM, RAM is organised into rows and columns. At each crossover, however, is an electronic device capable of storing a single bit of information. With the appropriate signal this may be either written-to or read-from.
In order to keep the bit stored the RAM chip must have electrical power.If power is removed the RAM chip "forgets" all bits stored within.
Because of this we say that RAM is volatile memory.
Static RAM uses small transistor circuits known as flip-flops (also called latches) to store individual bits. Stored data can be accessed very quickly.
Due to the number of transistors required, SRAM is extremely expensive and is therefore not economical to use for main memory.
Cache memory is built from SRAM, which is fast but expensive. Cache memory contains data read in advance from main memory, allowing the processor to retrieve information more quickly.
Dynamic RAM uses electronic capacitors to store electrical charge: charge for binary '1' and no-charge for '0'.
Unfortunately these tiny capacitors leak slightly and the charge needs to be refreshed at regular intervals (typically dozes of times per second). To achieve this, memory interfaces usually contain dedicated scan-and-refresh circuits.
Main memory is built from DRAM, which is cheap to manufacture but slower than SRAM.
To reduce the number of chip connections, DRAM row and column numbers are usually provided one-after-the-other. This is signalled by using RAS (Row Address Strobe) and CAS (Column Address Strobe) control wires.
When a processor asks for data from memory there will be a time delay while memory chip finds the appropriate data and returns it along the data bus. This delay is called a wait state.
Because most memory access uses consecutive addresses, processors can use a method called burst mode after RAS & CAS to read the next three addresses in a single burst.
To describe this we use a timing notation that describes the number of memory clock cycles required for each access. This will be given in the form x-y-y-y, for example 5-3-3-3.
This burst timing can become crucial when matching RAM in dual-channel systems or fine-tuning a system.
Normal DRAM operates in an asynchronous manner: if asked for data it will respond after a certain number of nanoseconds (e.g. 70 ns).
Synchronous DRAM (SDRAM) is tightly synchronised to a system clock (normally the FSB). Therefore SDRAM speeds are given as the clock frequency (in MHz) rather than a time delay (in nanoseconds).